Bump to 6.1
Signed-off-by: Piotr Gorski <lucjan.lucjanov@gmail.com>
This commit is contained in:
Piotr Gorski
parent
d06c0ebe1c
commit
c79304bd83
24
.SRCINFO
24
.SRCINFO
@ -1,6 +1,6 @@
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pkgbase = linux-cachyos
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pkgdesc = Linux BORE scheduler Kernel by CachyOS with other patches and improvements
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pkgver = 6.0.12
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pkgver = 6.1.0
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pkgrel = 1
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url = https://github.com/CachyOS/linux-cachyos
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arch = x86_64
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@ -21,20 +21,18 @@ pkgbase = linux-cachyos
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makedepends = make
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makedepends = patch
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options = !strip
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source = https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-6.0.12.tar.xz
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source = https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-6.1.tar.xz
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source = config
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source = config-rt
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source = auto-cpu-optimization.sh
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source = https://raw.githubusercontent.com/cachyos/kernel-patches/master/6.0/all/0001-cachyos-base-all.patch
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source = https://raw.githubusercontent.com/cachyos/kernel-patches/master/6.0/misc/0001-Add-latency-priority-for-CFS-class.patch
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source = https://raw.githubusercontent.com/cachyos/kernel-patches/master/6.0/sched/0001-bore-cachy.patch
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sha256sums = 89b730edf8942b49e02f9894244205886c9a214d629b35b88c4ff06ee9304f01
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sha256sums = 5ef4000fa382d718bc88a2c898534c94349bc38125fb0a5e6f90987c64338bc2
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sha256sums = 8e3332029a7e6574b8c5d1f98e5391a20871b889e0a65fc351584c26b9e2b0ef
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sha256sums = e1d45b5842079a5f0f53d7ea2d66ffa3f1497766f3ccffcf13ed00f1ac67f95e
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sha256sums = e56d2483f4abf9a6c935d3bd37d9b5892024daff957f58bc96eec23bfb181d8a
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sha256sums = 8a29fd18c2deb36cf0bbfb16a84819d86fa476ef4792d07dd627c945c0b55f4b
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sha256sums = 4b135afcb13e2a852048e99ee96f74eb4ba785039a447b43d3e87e03494e29d7
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source = https://raw.githubusercontent.com/cachyos/kernel-patches/master/6.1/all/0001-cachyos-base-all.patch
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source = https://raw.githubusercontent.com/cachyos/kernel-patches/master/6.1/misc/0001-Add-latency-priority-for-CFS-class.patch
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source = https://raw.githubusercontent.com/cachyos/kernel-patches/master/6.1/sched/0001-bore-cachy.patch
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sha256sums = 2ca1f17051a430f6fed1196e4952717507171acfd97d96577212502703b25deb
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sha256sums = 10205fdb7f16016658808d09e927b106f8286df17d511cf6374e2a6fcb265f26
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sha256sums = 32e77b3b71225c9f04df2d44c25f982773a8fff9927d26788366baab5e242e74
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sha256sums = dcb4652be945fd8de658b271e17a74e5d5c275b934bd852b766cb28c3f97d17d
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sha256sums = 7b3c12a19efe84f023bd64f0c984c73b0ec7a73c78cba96b5f92c5263ed2a46f
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sha256sums = e5c062656b1e3d65b5b10bf933aa6b0bd3f187b90336a067b1dd7d5ff635f002
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pkgname = linux-cachyos
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pkgdesc = The Linux BORE scheduler Kernel by CachyOS with other patches and improvements kernel and modules
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96
PKGBUILD
96
PKGBUILD
@ -141,37 +141,30 @@ _use_llvm_lto=${_use_llvm_lto-}
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# https://github.com/CachyOS/linux-cachyos/issues/36
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_use_lto_suffix=${_use_lto_suffix-y}
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# ATTENTION!: Really experimental LTO implementation for GCC
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# This can improve the performance of the kernel
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# The performance difference is currently negligible
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# DEBUG and BTF needs to be disabled, otherwise the compilation is failing
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# The Kernel is bigger with GCC LTO due to more inlining
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# More informations:
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# https://lore.kernel.org/lkml/20221114114344.18650-1-jirislaby@kernel.org/T/#md8014ad799b02221b67f33584002d98ede6234eb
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_use_gcc_lto=${_use_gcc_lto-}
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# KCFI is a proposed forward-edge control-flow integrity scheme for
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# Clang, which is more suitable for kernel use than the existing CFI
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# scheme used by CONFIG_CFI_CLANG. KCFI doesn't require LTO, doesn't
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# scheme used by CONFIG_CFI_CLANG. kCFI doesn't require LTO, doesn't
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# alter function references to point to a jump table, and won't break
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# function address equality.
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# ATTENTION!: you do need a patched llvm for the usage of kcfi,
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# you can find a patched llvm-git in the cachyos-repo's.
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# The packagename is called "llvm-kcfi"
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# ATTENTION!: This is very experimental and could fail and the compilation or have other bugs in the kernel
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# ATTENTION!: You need llvm-git or a patched llvm 15
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# ATTENTION!: This is experimental, could fail to boot with nvidia
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_use_kcfi=${_use_kcfi-}
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# Build the zfs module builtin in to the kernel
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# Build the zfs module in to the kernel
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_build_zfs=${_build_zfs-}
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# Enable bcachefs
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_bcachefs=${_bcachefs-}
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# Enable RT kernel
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# Only works for CFS Scheduler and BORE Scheduler
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_rtkernel=${_rtkernel-}
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# Enable NEST
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# NEST is a experimental cfs scheduler you can find more about here:
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# https://www.phoronix.com/news/Nest-Linux-Scheduling-Warm-Core
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# https://gitlab.inria.fr/nest-public/nest-artifact/-/tree/main
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# ATTENTION!:NEST is only active if you start applications with
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# taskset -c $THREADS application
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# example: taskset -c 0-23 application
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# ATTENTION!:Just works together with the BORE Scheduler and CFS Scheduler
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_nest=${_nest-}
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# Enable LATENCY NICE
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# Latency nice is a approach to sets latency-nice as a per-task attribute
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# It can improve the latency of applications similar to sched_nice, but focused on the latency
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@ -191,13 +184,13 @@ else
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pkgsuffix=cachyos
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pkgbase=linux-$pkgsuffix
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fi
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_major=6.0
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_minor=12
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_major=6.1
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_minor=0
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#_minorc=$((_minor+1))
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#_rcver=rc8
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pkgver=${_major}.${_minor}
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_stable=${_major}.${_minor}
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#_stable=${_major}
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#_stable=${_major}.${_minor}
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_stable=${_major}
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#_stablerc=${_major}-${_rcver}
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_srcname=linux-${_stable}
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#_srcname=linux-${_major}
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@ -227,7 +220,7 @@ fi
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_patchsource="https://raw.githubusercontent.com/cachyos/kernel-patches/master/${_major}"
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source=(
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"https://cdn.kernel.org/pub/linux/kernel/v${pkgver%%.*}.x/${_srcname}.tar.xz"
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"config" "config-rt"
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"config"
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"auto-cpu-optimization.sh"
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"${_patchsource}/all/0001-cachyos-base-all.patch")
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## ZFS Support
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@ -283,19 +276,15 @@ if [ -n "$_use_kcfi" ]; then
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LLVM=1
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)
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fi
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## NEST Support
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if [ -n "$_nest" ]; then
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if [[ "$_cpusched" = "bore" || "$_cpusched" = "cfs" || "$_cpusched" = "hardened" ]]; then
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source+=("${_patchsource}/sched/0001-NEST.patch")
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fi
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fi
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## bcachefs Support
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if [ -n "$_bcachefs" ]; then
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source+=("${_patchsource}/misc/0001-bcachefs-after-lru.patch")
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fi
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## rt kernel
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if [ -n "$_rtkernel" ]; then
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source+=("${_patchsource}/misc/0001-rt.patch")
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if [ -n "$_use_gcc_lto" ]; then
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## GCC-LTO Patch
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## Fix for current gcc --enable-default-pie option
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source+=("${_patchsource}/misc/gcc-lto/0001-gcc-LTO-support-for-the-kernel.patch"
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"${_patchsource}/misc/gcc-lto/0002-gcc-lto-no-pie.patch")
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fi
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export KBUILD_BUILD_HOST=cachyos
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@ -321,11 +310,7 @@ prepare() {
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done
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echo "Setting config..."
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if [ -n "$_rtkernel" ]; then
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cp ../config-rt .config
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else
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cp ../config .config
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fi
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cp ../config .config
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### Select CPU optimization
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if [ -n "$_processor_opt" ]; then
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@ -357,17 +342,6 @@ prepare() {
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exit
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fi
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### Selecting proper RT config
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if [ -n "$_rtkernel" ]; then
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echo "Setting proper RT config"
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scripts/config --enable RCU_NOCB_CPU_CB_BOOST \
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--disable RCU_NOCB_CPU_DEFAULT_ALL \
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--enable HZ_1000 \
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--set-val HZ 1000 \
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--enable PREEMPT_RT \
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--enable PREEMPT_LAZY
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fi
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### Selecting the CPU scheduler
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if [ "$_cpusched" = "bmq" ]; then
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echo "Selecting BMQ CPU scheduler..."
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@ -443,6 +417,15 @@ prepare() {
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scripts/config --enable LTO_NONE
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fi
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### Enable GCC FULL LTO
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### Disable LTO_CP_CLONE, its experimental
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if [ -n "$_use_gcc_lto" ]; then
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scripts/config --enable LTO_GCC \
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--disable LTO_CP_CLONE
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### Disable DEBUG, pahole is currently broken with GCC LTO
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_disable_debug=y
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fi
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### Select tick rate
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if [ "$_HZ_ticks" = "1000" ]; then
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echo "Setting tick rate to 1k Hz..."
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@ -1007,10 +990,9 @@ for _p in "${pkgname[@]}"; do
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}"
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done
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sha256sums=('89b730edf8942b49e02f9894244205886c9a214d629b35b88c4ff06ee9304f01'
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||||
'5ef4000fa382d718bc88a2c898534c94349bc38125fb0a5e6f90987c64338bc2'
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'8e3332029a7e6574b8c5d1f98e5391a20871b889e0a65fc351584c26b9e2b0ef'
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||||
'e1d45b5842079a5f0f53d7ea2d66ffa3f1497766f3ccffcf13ed00f1ac67f95e'
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||||
'e56d2483f4abf9a6c935d3bd37d9b5892024daff957f58bc96eec23bfb181d8a'
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||||
'8a29fd18c2deb36cf0bbfb16a84819d86fa476ef4792d07dd627c945c0b55f4b'
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'4b135afcb13e2a852048e99ee96f74eb4ba785039a447b43d3e87e03494e29d7')
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sha256sums=('2ca1f17051a430f6fed1196e4952717507171acfd97d96577212502703b25deb'
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'10205fdb7f16016658808d09e927b106f8286df17d511cf6374e2a6fcb265f26'
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||||
'32e77b3b71225c9f04df2d44c25f982773a8fff9927d26788366baab5e242e74'
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||||
'dcb4652be945fd8de658b271e17a74e5d5c275b934bd852b766cb28c3f97d17d'
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'7b3c12a19efe84f023bd64f0c984c73b0ec7a73c78cba96b5f92c5263ed2a46f'
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||||
'e5c062656b1e3d65b5b10bf933aa6b0bd3f187b90336a067b1dd7d5ff635f002')
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@ -7,6 +7,8 @@ elif [[ ${MARCH} == "ZNVER2" ]]; then
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MARCH="ZEN2"
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elif [[ ${MARCH} == "ZNVER3" ]]; then
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MARCH="ZEN3"
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elif [[ ${MARCH} == "ZNVER4" ]]; then
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MARCH="ZEN4"
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elif [[ ${MARCH} == "BDVER1" ]]; then
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MARCH="BULLDOZER"
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elif [[ ${MARCH} == "BDVER2" ]]; then
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164
configure
vendored
164
configure
vendored
@ -29,44 +29,47 @@ cpu_arch() {
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> 23) MZEN : Select this for AMD Family 17h Zen processors.\n \
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> 24) MZEN2 : Select this for AMD Family 17h Zen 2 processors.\n \
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> 25) MZEN3 : Select this for AMD Family 19h Zen 3 processors. - GCC 10.3 required\n \
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> 26) MCRUSOE : Select this for a Transmeta Crusoe processor.\n \
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> 27) MEFFICEON : Select this for a Transmeta Efficeon processor.\n \
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> 28) MWINCHIPC6 : Select this for an IDT Winchip C6 chip.\n \
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> 29) MWINCHIP3D : Select this for an IDT Winchip-2, 2A or 3.\n \
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> 30) MELAN : Select this for an AMD Elan processor.\n \
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> 31) MGEODEGX1 : Select this for a Geode GX1 (Cyrix MediaGX) chip.\n \
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> 32) MGEODE_LX Select this for AMD Geode GX and LX processors.\n \
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> 33) MCYRIXIII : Select this for a Cyrix III or C3 chip.\n \
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> 34) MVIAC3_2 : Select this for a VIA C3 "Nehemiah".\n \
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> 35) MVIAC7 : Select this for a VIA C7.\n \
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> 36) MPSC : Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey Xeon CPUs with Intel 64bit which is compatible with x86-64.\n \
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> 37) MATOM : Select this for the Intel Atom platform.\n \
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> 38) MCORE2 : Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx) CPUs.\n \
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> 39) MNEHALEM : Select this for 1st Gen Core processors in the Nehalem family.\n \
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> 40) MWESTMERE : Select this for the Intel Westmere formerly Nehalem-C family.\n \
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> 41) MSILVERMONT Select this for the Intel Silvermont platform.\n \
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> 42) MGOLDMONT : Select this for the Intel Goldmont platform including Apollo Lake and Denverton.\n \
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> 43) MGOLDMONTPLUS : Select this for the Intel Goldmont Plus platform including Gemini Lake.\n \
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> 44) MSANDYBRIDGE : Select this for 2nd Gen Core processors in the Sandy Bridge family.\n \
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> 45) MIVYBRIDGE : Select this for 3rd Gen Core processors in the Ivy Bridge family.\n \
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> 46) MHASWELL : Select this for 4th Gen Core processors in the Haswell family.\n \
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> 47) MBROADWELL : Select this for 5th Gen Core processors in the Broadwell family.\n \
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> 48) MSKYLAKE : Select this for 6th Gen Core processors in the Skylake family.\n \
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> 49) MSKYLAKEX : Select this for 6th Gen Core processors in the Skylake X family.\n \
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> 50) MCANNONLAKE : Select this for 8th Gen Core processors.\n \
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> 51) MICELAKE : Select this for 10th Gen Core processors in the Ice Lake family.\n \
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> 52) MCASCADELAKE : Select this for Xeon processors in the Cascade Lake family.\n \
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> 53) MCOOPERLAKE : Select this for Xeon processors in the Cooper Lake family. - GCC 10.1 required\n \
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> 54) MTIGERLAKE : Select this for third-generation 10 nm process processors in the Tiger Lake family. - GCC 10.1 required\n \
|
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> 55) MSAPPHIRERAPIDS : Select this for third-generation 10 nm process processors in the Sapphire Rapids family. - GCC 11 required\n \
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> 56) MALDERLAKE : Select this for twelfth-generation processors in the Alder Lake family.- GCC 11 required\n \
|
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> 57) GENERIC_CPU : Generic x86-64 CPU. Run equally well on all x86-64 CPUs.\n \
|
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> 58) GENERIC_CPU2 : Run equally well on all x86-64 CPUs with min support of x86-64-v2. - GCC 11 required\n \
|
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> 59) GENERIC_CPU3 : Generic x86-64-v3 CPU with v3 instructions. Run equally well on all x86-64 CPUs with min support of x86-64-v3. - GCC 11 required\n \
|
||||
> 60) GENERIC_CPU4 : Generic x86-64 CPU with v4 instructions. Run equally well on all x86-64 CPUs with min support of x86-64-v4. - GCC 11 required\n \
|
||||
> 61) MNATIVE_INTEL : Intel-Native optimizations autodetected by GCC.\n \
|
||||
> 62) MNATIVE_AMD : AMD-Native optimizations autodetected by GCC.\n \
|
||||
> Default (57 : Gneric CPU)\nchoice[0-62]: '`" _microarchitecture
|
||||
> 26) MZEN4 : Select this for AMD Family 19h Zen 4 processors. - GCC 13.1 required\n \
|
||||
> 27) MCRUSOE : Select this for a Transmeta Crusoe processor.\n \
|
||||
> 28) MEFFICEON : Select this for a Transmeta Efficeon processor.\n \
|
||||
> 29) MWINCHIPC6 : Select this for an IDT Winchip C6 chip.\n \
|
||||
> 30) MWINCHIP3D : Select this for an IDT Winchip-2, 2A or 3.\n \
|
||||
> 31) MELAN : Select this for an AMD Elan processor.\n \
|
||||
> 32) MGEODEGX1 : Select this for a Geode GX1 (Cyrix MediaGX) chip.\n \
|
||||
> 33) MGEODE_LX Select this for AMD Geode GX and LX processors.\n \
|
||||
> 34) MCYRIXIII : Select this for a Cyrix III or C3 chip.\n \
|
||||
> 35) MVIAC3_2 : Select this for a VIA C3 "Nehemiah".\n \
|
||||
> 36) MVIAC7 : Select this for a VIA C7.\n \
|
||||
> 37) MPSC : Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey Xeon CPUs with Intel 64bit which is compatible with x86-64.\n \
|
||||
> 38) MATOM : Select this for the Intel Atom platform.\n \
|
||||
> 39) MCORE2 : Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx) CPUs.\n \
|
||||
> 40) MNEHALEM : Select this for 1st Gen Core processors in the Nehalem family.\n \
|
||||
> 41) MWESTMERE : Select this for the Intel Westmere formerly Nehalem-C family.\n \
|
||||
> 42) MSILVERMONT Select this for the Intel Silvermont platform.\n \
|
||||
> 43) MGOLDMONT : Select this for the Intel Goldmont platform including Apollo Lake and Denverton.\n \
|
||||
> 44) MGOLDMONTPLUS : Select this for the Intel Goldmont Plus platform including Gemini Lake.\n \
|
||||
> 45) MSANDYBRIDGE : Select this for 2nd Gen Core processors in the Sandy Bridge family.\n \
|
||||
> 46) MIVYBRIDGE : Select this for 3rd Gen Core processors in the Ivy Bridge family.\n \
|
||||
> 47) MHASWELL : Select this for 4th Gen Core processors in the Haswell family.\n \
|
||||
> 48) MBROADWELL : Select this for 5th Gen Core processors in the Broadwell family.\n \
|
||||
> 49) MSKYLAKE : Select this for 6th Gen Core processors in the Skylake family.\n \
|
||||
> 50) MSKYLAKEX : Select this for 6th Gen Core processors in the Skylake X family.\n \
|
||||
> 51) MCANNONLAKE : Select this for 8th Gen Core processors.\n \
|
||||
> 52) MICELAKE : Select this for 10th Gen Core processors in the Ice Lake family.\n \
|
||||
> 53) MCASCADELAKE : Select this for Xeon processors in the Cascade Lake family.\n \
|
||||
> 54) MCOOPERLAKE : Select this for Xeon processors in the Cooper Lake family. - GCC 10.1 required\n \
|
||||
> 55) MTIGERLAKE : Select this for third-generation 10 nm process processors in the Tiger Lake family. - GCC 10.1 required\n \
|
||||
> 56) MSAPPHIRERAPIDS : Select this for third-generation 10 nm process processors in the Sapphire Rapids family. - GCC 11 required\n \
|
||||
> 57) MALDERLAKE : Select this for twelfth-generation processors in the Alder Lake family.- GCC 11 required\n \
|
||||
> 58) MRAPTORLAKE : Select this for thirteenth-generation processors in the Raptor Lake family.- GCC 13 required\n \
|
||||
> 59) MMETORLAKE : Select this for fourteenth-generation processors in the Meteor Lake family.- GCC 13 required\n \
|
||||
> 60) GENERIC_CPU : Generic x86-64 CPU. Run equally well on all x86-64 CPUs.\n \
|
||||
> 61) GENERIC_CPU2 : Run equally well on all x86-64 CPUs with min support of x86-64-v2. - GCC 11 required\n \
|
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> 62) GENERIC_CPU3 : Generic x86-64-v3 CPU with v3 instructions. Run equally well on all x86-64 CPUs with min support of x86-64-v3. - GCC 11 required\n \
|
||||
> 63) GENERIC_CPU4 : Generic x86-64 CPU with v4 instructions. Run equally well on all x86-64 CPUs with min support of x86-64-v4. - GCC 11 required\n \
|
||||
> 64) MNATIVE_INTEL : Intel-Native optimizations autodetected by GCC.\n \
|
||||
> 65) MNATIVE_AMD : AMD-Native optimizations autodetected by GCC.\n \
|
||||
> Default (60 : Gneric CPU)\nchoice[0-65]: '`" _microarchitecture
|
||||
|
||||
if [[ "$_microarchitecture" = "1" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
@ -145,114 +148,123 @@ cpu_arch() {
|
||||
scripts/config --enable CONFIG_MZEN3
|
||||
elif [[ "$_microarchitecture" = "26" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MCRUSOE
|
||||
scripts/config --enable CONFIG_MZEN4
|
||||
elif [[ "$_microarchitecture" = "27" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MEFFICEON
|
||||
scripts/config --enable CONFIG_MCRUSOE
|
||||
elif [[ "$_microarchitecture" = "28" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MWINCHIPC6
|
||||
scripts/config --enable CONFIG_MEFFICEON
|
||||
elif [[ "$_microarchitecture" = "29" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MWINCHIP3D
|
||||
scripts/config --enable CONFIG_MWINCHIPC6
|
||||
elif [[ "$_microarchitecture" = "30" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MELAN
|
||||
scripts/config --enable CONFIG_MWINCHIP3D
|
||||
elif [[ "$_microarchitecture" = "31" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MGEODEGX1
|
||||
scripts/config --enable CONFIG_MELAN
|
||||
elif [[ "$_microarchitecture" = "32" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MGEODE_LX
|
||||
scripts/config --enable CONFIG_MGEODEGX1
|
||||
elif [[ "$_microarchitecture" = "33" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MCYRIXIII
|
||||
scripts/config --enable CONFIG_MGEODE_LX
|
||||
elif [[ "$_microarchitecture" = "34" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MVIAC3_2
|
||||
scripts/config --enable CONFIG_MCYRIXIII
|
||||
elif [[ "$_microarchitecture" = "35" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MVIAC7
|
||||
scripts/config --enable CONFIG_MVIAC3_2
|
||||
elif [[ "$_microarchitecture" = "36" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MPSC
|
||||
scripts/config --enable CONFIG_MVIAC7
|
||||
elif [[ "$_microarchitecture" = "37" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MATOM
|
||||
scripts/config --enable CONFIG_MPSC
|
||||
elif [[ "$_microarchitecture" = "38" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MCORE2
|
||||
scripts/config --enable CONFIG_MATOM
|
||||
elif [[ "$_microarchitecture" = "39" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MNEHALEM
|
||||
scripts/config --enable CONFIG_MCORE2
|
||||
elif [[ "$_microarchitecture" = "40" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MWESTMERE
|
||||
scripts/config --enable CONFIG_MNEHALEM
|
||||
elif [[ "$_microarchitecture" = "41" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MSILVERMONT
|
||||
scripts/config --enable CONFIG_MWESTMERE
|
||||
elif [[ "$_microarchitecture" = "42" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MGOLDMONT
|
||||
scripts/config --enable CONFIG_MSILVERMONT
|
||||
elif [[ "$_microarchitecture" = "43" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MGOLDMONTPLUS
|
||||
scripts/config --enable CONFIG_MGOLDMONT
|
||||
elif [[ "$_microarchitecture" = "44" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MSANDYBRIDGE
|
||||
scripts/config --enable CONFIG_MGOLDMONTPLUS
|
||||
elif [[ "$_microarchitecture" = "45" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MSANDYBRIDGE
|
||||
elif [[ "$_microarchitecture" = "46" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --disable CONFIG_AGP_AMD64
|
||||
scripts/config --disable CONFIG_MICROCODE_AMD
|
||||
scripts/config --enable CONFIG_MIVYBRIDGE
|
||||
elif [[ "$_microarchitecture" = "46" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MHASWELL
|
||||
elif [[ "$_microarchitecture" = "47" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MBROADWELL
|
||||
scripts/config --enable CONFIG_MHASWELL
|
||||
elif [[ "$_microarchitecture" = "48" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MSKYLAKE
|
||||
scripts/config --enable CONFIG_MBROADWELL
|
||||
elif [[ "$_microarchitecture" = "49" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MSKYLAKEX
|
||||
scripts/config --enable CONFIG_MSKYLAKE
|
||||
elif [[ "$_microarchitecture" = "50" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MCANNONLAKE
|
||||
scripts/config --enable CONFIG_MSKYLAKEX
|
||||
elif [[ "$_microarchitecture" = "51" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MICELAKE
|
||||
scripts/config --enable CONFIG_MCANNONLAKE
|
||||
elif [[ "$_microarchitecture" = "52" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MCASCADELAKE
|
||||
scripts/config --enable CONFIG_MICELAKE
|
||||
elif [[ "$_microarchitecture" = "53" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MCOOPERLAKE
|
||||
scripts/config --enable CONFIG_MCASCADELAKE
|
||||
elif [[ "$_microarchitecture" = "54" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MTIGERLAKE
|
||||
scripts/config --enable CONFIG_MCOOPERLAKE
|
||||
elif [[ "$_microarchitecture" = "55" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MSAPPHIRERAPIDS
|
||||
scripts/config --enable CONFIG_MTIGERLAKE
|
||||
elif [[ "$_microarchitecture" = "56" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MALDERLAKE
|
||||
scripts/config --enable CONFIG_MSAPPHIRERAPIDS
|
||||
elif [[ "$_microarchitecture" = "57" ]]; then
|
||||
scripts/config --enable CONFIG_GENERIC_CPU
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MALDERLAKE
|
||||
elif [[ "$_microarchitecture" = "58" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_GENERIC_CPU2
|
||||
scripts/config --enable CONFIG_MRAPTORLAKE
|
||||
elif [[ "$_microarchitecture" = "59" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_GENERIC_CPU3
|
||||
scripts/config --enable CONFIG_MMETORLAKE
|
||||
elif [[ "$_microarchitecture" = "60" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_GENERIC_CPU4
|
||||
scripts/config --enable CONFIG_GENERIC_CPU
|
||||
elif [[ "$_microarchitecture" = "61" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MNATIVE_INTEL
|
||||
scripts/config --enable CONFIG_GENERIC_CPU2
|
||||
elif [[ "$_microarchitecture" = "62" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_GENERIC_CPU3
|
||||
elif [[ "$_microarchitecture" = "63" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_GENERIC_CPU4
|
||||
elif [[ "$_microarchitecture" = "64" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MNATIVE_INTEL
|
||||
elif [[ "$_microarchitecture" = "65" ]]; then
|
||||
scripts/config --disable CONFIG_GENERIC_CPU
|
||||
scripts/config --enable CONFIG_MNATIVE_AMD
|
||||
else
|
||||
|
||||
Loading…
Reference in New Issue
Block a user